@inproceedings{d373f669be474b08873b539b4777a5ef,
title = "Verilog-A compact model of a ME-MTJ based XNOR/NOR gate",
abstract = "We present the first Verilog-A based models of a magneto-electric magnetic tunnel junction (ME-MTJ) based XNOR and NOR logic gates. The ME-MTJ is a low-power beyond-CMOS technology, with possible applications in memory and logic devices. The models presented here have been developed in Verilog-A and validated with simulations using cadence spectre. We show the operation of this ME-MTJ dual-purpose logic gate illustrating integrated memory capabilities. A full adder based on the XNOR gate is also validated.",
keywords = "Adder, logic, Magnetic Tunnel Junction (MTJ), Magneto-Electric Magnetic Tunnel Junction (ME-MTJ), Memory, NOR, Spintronics, Verilog-A, XNOR",
author = "Nishtha Sharma and Andrew Marshall and Jonathan Bird",
note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 2017 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2017 ; Conference date: 25-07-2017 Through 26-07-2017",
year = "2017",
month = sep,
day = "28",
doi = "10.1109/NANOARCH.2017.8053716",
language = "English",
series = "Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2017",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "162--167",
booktitle = "Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2017",
address = "United States",
}