TY - GEN
T1 - VCO based Nyquist-rate ADC with FVCO of Fs/2
AU - Radhakrishnan, Chandrasekhar
AU - Datta Sahoo, Bibhu
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/9/27
Y1 - 2017/9/27
N2 - Relentless pursuit of Moore's law, while providing immense speed, power, and cost benefits in digital circuits, has thrown open many challenges in analog circuit design, especially analog-to-digital converter (ADC) design. Present day ADC's must be able to achieve an extremely high level of performance in terms of both resolution and bandwidth. High-resolution and high-bandwidth input modulated parallel ΔΣ-ADCs have been proposed earlier [1]. However, the large size of a conventional ΔΣ-ADC severely constrains the amount of parallelism. Voltage Controlled Oscillator (VCO) based 1st-order noise-shaped ADCs being mostly digital in nature can exploit the scaling trend and can therefore be realized in a small area. Thus, using VCO based 1st-order noise-shaping, a large amount of parallelism can be achieved to enable the design of high-resolution, high-bandwidth ADCs. This work provides an intuitive explanation of input modulated parallel ADCs and proposes a 32-channel VCO based ADC operating at a sampling rate, Fs, of 200 MHz and achieving an SNR of 65-dB, with the VCOs in each channel oscillating at a meagre frequency, Fvco = Fs/2 = 100 MHz.
AB - Relentless pursuit of Moore's law, while providing immense speed, power, and cost benefits in digital circuits, has thrown open many challenges in analog circuit design, especially analog-to-digital converter (ADC) design. Present day ADC's must be able to achieve an extremely high level of performance in terms of both resolution and bandwidth. High-resolution and high-bandwidth input modulated parallel ΔΣ-ADCs have been proposed earlier [1]. However, the large size of a conventional ΔΣ-ADC severely constrains the amount of parallelism. Voltage Controlled Oscillator (VCO) based 1st-order noise-shaped ADCs being mostly digital in nature can exploit the scaling trend and can therefore be realized in a small area. Thus, using VCO based 1st-order noise-shaping, a large amount of parallelism can be achieved to enable the design of high-resolution, high-bandwidth ADCs. This work provides an intuitive explanation of input modulated parallel ADCs and proposes a 32-channel VCO based ADC operating at a sampling rate, Fs, of 200 MHz and achieving an SNR of 65-dB, with the VCOs in each channel oscillating at a meagre frequency, Fvco = Fs/2 = 100 MHz.
UR - https://www.scopus.com/pages/publications/85034061576
U2 - 10.1109/MWSCAS.2017.8053100
DO - 10.1109/MWSCAS.2017.8053100
M3 - Conference contribution
AN - SCOPUS:85034061576
T3 - Midwest Symposium on Circuits and Systems
SP - 1021
EP - 1024
BT - 2017 IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 60th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2017
Y2 - 6 August 2017 through 9 August 2017
ER -