Toward an Analog VLSI Implementation of Adaptive Resonance Theory (ART2)

Senthil Kumar Ganapathy; Albert H. Titus

Toward an Analog VLSI Implementation of Adaptive Resonance Theory (ART2)

Senthil Kumar Ganapathy
, Albert H. Titus

Department of Biomedical Engineering

SUNY Buffalo

Research output: Contribution to conference › Paper › peer-review

4 Scopus citations

Abstract

We describe the architecture for an analog VLSI implementation of the ART2 network. This design uses primarily analog circuitry, with some digital clocking for controlling switches for storage and timing. The system operates in current-mode, which simplifies much of the circuitry. The network is broken into four major blocks and we describe the circuitry that can implement these blocks. This represents an important first step toward an analog hardware implementation of ART2.

Original language	English
Pages	936-941
Number of pages	6
State	Published - 2003
Event	International Joint Conference on Neural Networks 2003 - Portland, OR, United States Duration: Jul 20 2003 → Jul 24 2003

Conference

Conference	International Joint Conference on Neural Networks 2003
Country/Territory	United States
City	Portland, OR
Period	07/20/03 → 07/24/03

Cite this

@conference{e089143c1d9a40a58b0dfb0bef567f91,

title = "Toward an Analog VLSI Implementation of Adaptive Resonance Theory (ART2)",

abstract = "We describe the architecture for an analog VLSI implementation of the ART2 network. This design uses primarily analog circuitry, with some digital clocking for controlling switches for storage and timing. The system operates in current-mode, which simplifies much of the circuitry. The network is broken into four major blocks and we describe the circuitry that can implement these blocks. This represents an important first step toward an analog hardware implementation of ART2.",

author = "Ganapathy, \{Senthil Kumar\} and Titus, \{Albert H.\}",

year = "2003",

language = "English",

pages = "936--941",

note = "International Joint Conference on Neural Networks 2003 ; Conference date: 20-07-2003 Through 24-07-2003",

}

TY - CONF

T1 - Toward an Analog VLSI Implementation of Adaptive Resonance Theory (ART2)

AU - Ganapathy, Senthil Kumar

AU - Titus, Albert H.

PY - 2003

Y1 - 2003

N2 - We describe the architecture for an analog VLSI implementation of the ART2 network. This design uses primarily analog circuitry, with some digital clocking for controlling switches for storage and timing. The system operates in current-mode, which simplifies much of the circuitry. The network is broken into four major blocks and we describe the circuitry that can implement these blocks. This represents an important first step toward an analog hardware implementation of ART2.

AB - We describe the architecture for an analog VLSI implementation of the ART2 network. This design uses primarily analog circuitry, with some digital clocking for controlling switches for storage and timing. The system operates in current-mode, which simplifies much of the circuitry. The network is broken into four major blocks and we describe the circuitry that can implement these blocks. This represents an important first step toward an analog hardware implementation of ART2.

UR - https://www.scopus.com/pages/publications/0141572362

M3 - Paper

AN - SCOPUS:0141572362

SP - 936

EP - 941

T2 - International Joint Conference on Neural Networks 2003

Y2 - 20 July 2003 through 24 July 2003

ER -

Toward an Analog VLSI Implementation of Adaptive Resonance Theory (ART2)

Abstract

Conference

Other files and links

Fingerprint

Cite this