Task scheduling model and algorithm based on dual-Vdd dynamic reconfigurable FPGA

A non-preemptive task model based on dual-supply voltage (Vdd) dynamic reconfigurable field programmable gate array (FPGA) was established by analyzing single voltage reconfigurable FPGA. The model described how the tasks excused in dual-Vdd dynamic reconfigurable FPGA and added special attributes of dual-Vdd task model based on single voltage task model. A novel scheduling strategy was proposed based on the first-fit-decreasing algorithm. The strategy can guarantee the execution deadline of the task set and greatly reduce the execution energy using dynamic adjustment of dual-Vdd. The experiment simulated on Sun Saloris shows that the strategy can achieve the great energy saving, which is up to 24.1% of large task set.