Abstract
This paper describes a new radix based calibration technique for pipelined analog-to-digital converters (ADCs). The proposed technique uses sinusoidal signal sampled at Nyquist rate to mitigate the effects of capacitor mismatch and finite op amp gain error that degrade the performance of a typical pipelined ADC. The calibration has been illustrated using a 1.5-bit per stage non-flipover topology. This technique is promising compared to the existing foreground calibration algorithms as it requires sinusoidal input which is easily available. Since this technique does the calibration at Nyquist rate it captures the finite op amp settling effect, which no other foreground calibration technique does. Behavioral simulations for a 12-bit pipelined ADC which has 11, 1.5-bit stages followed by 2-bit flash, validate the calibration technique.
| Original language | English |
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| Pages | 2985-2988 |
| Number of pages | 4 |
| DOIs | |
| State | Published - 2012 |
| Event | 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of Duration: May 20 2012 → May 23 2012 |
Conference
| Conference | 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 |
|---|---|
| Country/Territory | Korea, Republic of |
| City | Seoul |
| Period | 05/20/12 → 05/23/12 |
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