@inproceedings{e44e14e271eb4e9f80e1240ad8095852,
title = "Prime+Count: Novel Cross-world Covert Channels on ARM TrustZone",
abstract = "The security of ARM TrustZone relies on the idea of splitting system-on-chip hardware and software into two worlds, namely normal world and secure world. In this paper, we report cross-world covert channels, which exploit the world-shared cache in the TrustZone architecture. We design a Prime+Count technique that only cares about how many cache sets or lines have been occupied. The coarser-grained approach significantly reduces the noise introduced by the pseudo-random replacement policy and world switching. Using our Prime+Count technique, we build covert channels in single-core and cross-core scenarios in the TrustZone architecture. Our results demonstrate that Prime+Count is an effective technique for enabling cross-world covert channels on ARM TrustZone.",
keywords = "ARM TrustZone, Cache side-channel, Covert channels",
author = "Haehyun Cho and Penghui Zhang and Donguk Kim and Jinbum Park and Lee, \{Choong Hoon\} and Ziming Zhao and Adam Doup{\'e} and Ahn, \{Gail Joon\}",
note = "Publisher Copyright: {\textcopyright} 2018 ACM.; 34th Annual Computer Security Applications Conference, ACSAC 2018 ; Conference date: 03-12-2018 Through 07-12-2018",
year = "2018",
month = jan,
day = "22",
doi = "10.1145/3274694.3274704",
language = "English",
series = "ACM International Conference Proceeding Series",
publisher = "Association for Computing Machinery ",
pages = "441--452",
booktitle = "Proceedings of the 3rd International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems, AISTECS 2018",
address = "United States",
}