Abstract
Existing layout optimization methods often assume a set of interconnects with given RLC crosstalk bounds in a routing region. RLC crosstalk bound partitioning is critical for effectively applying these methods at the full-chip level. In this paper, we develop an optimal crosstalk budgeting scheme based on linear programming (LP) formulation, and apply it to shield insertion and net ordering at the full-chip level. Experiment results show that compared to the best alternative approach, the LP based method reduces the total routing area by up to 7.61% and also uses less runtime. To the best of our knowledge, this is the first in-depth work that studies the RLC crosstalk budgeting problem.
| Original language | English |
|---|---|
| Pages (from-to) | 504-509 |
| Number of pages | 6 |
| Journal | IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers |
| DOIs | |
| State | Published - 2002 |
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