Abstract
The complex operations and considerable process time variability of printed circuit board (PCB) fabrication create difficulties in finding effective and efficient planning techniques for today's PCB production management. A great deal of money is involved. By modeling and testing a real world PCB fabrication facility, this paper shows that computer simulation can provide a viable planning tool to estimate production capacity and to explore optimum arrangement in batch work size of key bottleneck machines to minimize product throughput time. Many simulation experiments are performed and the results analyzed as a response surface. The general characteristic of product throughput time is found to be that its minimal value exists when batch job numbers of subsequential key machines are matched in batch size or in multiples thereof. A nonlinear empirical equation to estimate product throughput time has been derived from the simulation results.
| Original language | English |
|---|---|
| Pages (from-to) | 47-57 |
| Number of pages | 11 |
| Journal | Journal of Manufacturing Systems |
| Volume | 6 |
| Issue number | 1 |
| DOIs | |
| State | Published - 1987 |
Keywords
- Batch Size
- Computer Simulation
- Optimization
- Printed Circuit Board Fabrication
- Response-Surface Methodology
- Throughput Time
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