Novel ring oscillator design using ME-MTJ based devices

Nishtha Sharma; Andrew Marshall; Jonathan Bird; Peter Dowben

doi:10.1109/E3S.2017.8246187

Novel ring oscillator design using ME-MTJ based devices

Nishtha Sharma
, Andrew Marshall
, Jonathan Bird
, Peter Dowben

Department of Electrical Engineering

University of Texas at Dallas
SUNY Buffalo

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

We present three oscillator designs based on -The ME-MTJ devices i.e. -The ME inverter/buffer, -The ME majority gate and -The ME-XNOR gate. Compact models written in Verilog-A are used along with -The Cadence suite to validate -The functionality of -The oscillators proposed. Fur-Thermore, a 2-stage ME ring oscillator is proposed to generate clock signals for running a ME-MTJ based 1-bit full adder and -The adder is validated for operation. Performance of -The ME-MTJ based circuits is greatly enhanced with -The incorporation of ME-MTJ devices in -The clocking scheme because all -The circuit elements can run at -The maximum possible speed with no timing synchronization error.

Original language	English
Title of host publication	2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1-3
Number of pages	3
ISBN (Electronic)	9781538632901
DOIs	https://doi.org/10.1109/E3S.2017.8246187
State	Published - Jun 28 2017
Event	5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Berkeley, United States Duration: Oct 19 2017 → Oct 20 2017

Publication series

Name	2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings
Volume	2018-January

Conference

Conference	5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017
Country/Territory	United States
City	Berkeley
Period	10/19/17 → 10/20/17

Access to Document

10.1109/E3S.2017.8246187

Cite this

Sharma, N., Marshall, A., Bird, J., & Dowben, P. (2017). Novel ring oscillator design using ME-MTJ based devices. In 2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings (pp. 1-3). (2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings; Vol. 2018-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/E3S.2017.8246187

Sharma, Nishtha ; Marshall, Andrew ; Bird, Jonathan et al. / Novel ring oscillator design using ME-MTJ based devices. 2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 1-3 (2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings).

@inproceedings{30ee98e80db745dda5c0e7a927c2af1d,

title = "Novel ring oscillator design using ME-MTJ based devices",

abstract = "We present three oscillator designs based on -The ME-MTJ devices i.e. -The ME inverter/buffer, -The ME majority gate and -The ME-XNOR gate. Compact models written in Verilog-A are used along with -The Cadence suite to validate -The functionality of -The oscillators proposed. Fur-Thermore, a 2-stage ME ring oscillator is proposed to generate clock signals for running a ME-MTJ based 1-bit full adder and -The adder is validated for operation. Performance of -The ME-MTJ based circuits is greatly enhanced with -The incorporation of ME-MTJ devices in -The clocking scheme because all -The circuit elements can run at -The maximum possible speed with no timing synchronization error.",

author = "Nishtha Sharma and Andrew Marshall and Jonathan Bird and Peter Dowben",

note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 ; Conference date: 19-10-2017 Through 20-10-2017",

year = "2017",

month = jun,

day = "28",

doi = "10.1109/E3S.2017.8246187",

language = "English",

series = "2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "1--3",

booktitle = "2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings",

address = "United States",

}

Sharma, N, Marshall, A, Bird, J & Dowben, P 2017, Novel ring oscillator design using ME-MTJ based devices. in 2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings. 2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings, vol. 2018-January, Institute of Electrical and Electronics Engineers Inc., pp. 1-3, 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017, Berkeley, United States, 10/19/17. https://doi.org/10.1109/E3S.2017.8246187

Novel ring oscillator design using ME-MTJ based devices. / Sharma, Nishtha; Marshall, Andrew; Bird, Jonathan et al.
2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2017. p. 1-3 (2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings; Vol. 2018-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Novel ring oscillator design using ME-MTJ based devices

AU - Sharma, Nishtha

AU - Marshall, Andrew

AU - Bird, Jonathan

AU - Dowben, Peter

PY - 2017/6/28

Y1 - 2017/6/28

N2 - We present three oscillator designs based on -The ME-MTJ devices i.e. -The ME inverter/buffer, -The ME majority gate and -The ME-XNOR gate. Compact models written in Verilog-A are used along with -The Cadence suite to validate -The functionality of -The oscillators proposed. Fur-Thermore, a 2-stage ME ring oscillator is proposed to generate clock signals for running a ME-MTJ based 1-bit full adder and -The adder is validated for operation. Performance of -The ME-MTJ based circuits is greatly enhanced with -The incorporation of ME-MTJ devices in -The clocking scheme because all -The circuit elements can run at -The maximum possible speed with no timing synchronization error.

AB - We present three oscillator designs based on -The ME-MTJ devices i.e. -The ME inverter/buffer, -The ME majority gate and -The ME-XNOR gate. Compact models written in Verilog-A are used along with -The Cadence suite to validate -The functionality of -The oscillators proposed. Fur-Thermore, a 2-stage ME ring oscillator is proposed to generate clock signals for running a ME-MTJ based 1-bit full adder and -The adder is validated for operation. Performance of -The ME-MTJ based circuits is greatly enhanced with -The incorporation of ME-MTJ devices in -The clocking scheme because all -The circuit elements can run at -The maximum possible speed with no timing synchronization error.

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DO - 10.1109/E3S.2017.8246187

M3 - Conference contribution

AN - SCOPUS:85045993115

T3 - 2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings

SP - 1

EP - 3

BT - 2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

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Sharma N, Marshall A, Bird J, Dowben P. Novel ring oscillator design using ME-MTJ based devices. In 2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2017. p. 1-3. (2017 5th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2017 - Proceedings). doi: 10.1109/E3S.2017.8246187

Novel ring oscillator design using ME-MTJ based devices

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