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Multi-bit adder design using ME-MTJ technology

  • University of Texas at Dallas
  • University of Nebraska-Lincoln

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

The inherent advantages of ME-MTJ devices are extremely low power consumption and the device level memory capability. We demonstrate the complex circuit design required for Magneto-Electric Magnetic Tunnel Junction (ME-MTJ) based logic. The clocking required is readily achievable, permitting large-scale designs to be considered. Compact models for the ME-MTJ based devices have been previously proposed. Using the models and circuits, we present simulation results of a 5-bit adder along with a complex clocking scheme.

Original languageEnglish
Title of host publicationASDAM 2016 - Conference Proceedings, 11th International Conference on Advanced Semiconductor Devices and Microsystems
EditorsStefan Hascik, Jaroslav Dzuba, Gabriel Vanko
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages89-92
Number of pages4
ISBN (Electronic)9781509030835
DOIs
StatePublished - Jan 4 2017
Event11th International Conference on Advanced Semiconductor Devices and Microsystems, ASDAM 2016 - Smolenice, Slovakia
Duration: Nov 13 2016Nov 16 2016

Publication series

NameASDAM 2016 - Conference Proceedings, 11th International Conference on Advanced Semiconductor Devices and Microsystems

Conference

Conference11th International Conference on Advanced Semiconductor Devices and Microsystems, ASDAM 2016
Country/TerritorySlovakia
CitySmolenice
Period11/13/1611/16/16

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