Layered Decoding Algorithm and Two-Level Quasi-Cyclic Matrix Construction for Rate Compatible Modulation

Rate-compatible modulation (RCM) achieves seamless rate adaptation under time-varying channels by varying the number of transmitted symbols at a small granularity. The implementation of effective decoders based on the belief propagation (BP) algorithm suffers from the varying number of symbols and highly complex symbol nodes. Considering these RCM-specific characteristics, we present a top-down design methodology, including decoding algorithm, mapping matrix construction, and hardware implementation. The layered BP algorithm provides the potential to implement the decoders that fine-tune the decoding throughput according to the number of symbols. To mitigate the impact of inter-layer data dependency on decoding throughput and facilitate the implementation of low parallelism decoders, a construction and optimization algorithm is proposed to obtain the two-level quasi-cyclic matrices with small sub-matrix size. The proposed algorithm and matrix are applied to a partially parallel RCM decoder for a 5544 × 5544 matrix on a field-programmable gate-array (FPGA) device. A memory access structure that requires only one barrel shifter is used to improve area efficiency. The post-route results show that the decoder achieves a throughput of 377 M 1100 Mbit/s at six iterations with a clock frequency of 218 MHz.