Abstract
This paper answers an open question in the design of complimentary metal-oxide semiconductor (CMOS) VLSI circuits. It asks whether a polynomial-time algorithm can decide if a given planar graph has a plane embedding E such that E has an Euler trail P = e1e2...em and its dual graph has an Euler trail P* = e1*e2*...em* where ei* is the dual edge of ei for i = 1,2,...,m. This paper answers this question in the affirmative, by presenting a linear-time algorithm.
| Original language | English |
|---|---|
| Pages (from-to) | 319-329 |
| Number of pages | 11 |
| Journal | Annual Symposium on Foundations of Computer Science - Proceedings |
| State | Published - 1999 |
| Event | Proceedings of the 1999 IEEE 40th Annual Conference on Foundations of Computer Science - New York, NY, USA Duration: Oct 17 1999 → Oct 19 1999 |
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