Fault diagnosis of analog circuits using artificial neural networks as signature analyzers

R. Spina; S. Upadhyaya

doi:10.1109/ASIC.1992.270220

Fault diagnosis of analog circuits using artificial neural networks as signature analyzers

R. Spina
, S. Upadhyaya

Department of Computer Science and Engineering

SUNY Buffalo

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

10 Scopus citations

Abstract

Experimental results using neural networks to provide go/no-go testing and fault diagnosis of analog circuits are presented. The primary focus is on reducing test time and providing a simple mechanism for automatic test pattern generation. Networks of reasonable dimension are shown to be capable of robust diagnosis of analog circuits, including effects due to tolerances and nonlinearities. The concepts are extended to include an approach to built-in test of analog or mixed signal ASICs.

Original language	English
Title of host publication	Proceedings - 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992
Publisher	IEEE Computer Society
Pages	355-358
Number of pages	4
ISBN (Electronic)	0780307682
DOIs	https://doi.org/10.1109/ASIC.1992.270220
State	Published - 1992
Event	5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992 - Rochester, United States Duration: Sep 21 1992 → Sep 25 1992

Publication series

Name	Proceedings of International Conference on ASIC
ISSN (Print)	2162-7541
ISSN (Electronic)	2162-755X

Conference

Conference	5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992
Country/Territory	United States
City	Rochester
Period	09/21/92 → 09/25/92

Access to Document

10.1109/ASIC.1992.270220

Cite this

@inproceedings{395178120054416eaa34825b52b727db,

title = "Fault diagnosis of analog circuits using artificial neural networks as signature analyzers",

abstract = "Experimental results using neural networks to provide go/no-go testing and fault diagnosis of analog circuits are presented. The primary focus is on reducing test time and providing a simple mechanism for automatic test pattern generation. Networks of reasonable dimension are shown to be capable of robust diagnosis of analog circuits, including effects due to tolerances and nonlinearities. The concepts are extended to include an approach to built-in test of analog or mixed signal ASICs.",

author = "R. Spina and S. Upadhyaya",

note = "Publisher Copyright: {\textcopyright} 1992 IEEE.; 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992 ; Conference date: 21-09-1992 Through 25-09-1992",

year = "1992",

doi = "10.1109/ASIC.1992.270220",

language = "English",

series = "Proceedings of International Conference on ASIC",

publisher = "IEEE Computer Society",

pages = "355--358",

booktitle = "Proceedings - 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992",

address = "United States",

}

Spina, R & Upadhyaya, S 1992, Fault diagnosis of analog circuits using artificial neural networks as signature analyzers. in Proceedings - 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992., 270220, Proceedings of International Conference on ASIC, IEEE Computer Society, pp. 355-358, 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992, Rochester, United States, 09/21/92. https://doi.org/10.1109/ASIC.1992.270220

Fault diagnosis of analog circuits using artificial neural networks as signature analyzers. / Spina, R.; Upadhyaya, S.
Proceedings - 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992. IEEE Computer Society, 1992. p. 355-358 270220 (Proceedings of International Conference on ASIC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

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AU - Upadhyaya, S.

PY - 1992

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N2 - Experimental results using neural networks to provide go/no-go testing and fault diagnosis of analog circuits are presented. The primary focus is on reducing test time and providing a simple mechanism for automatic test pattern generation. Networks of reasonable dimension are shown to be capable of robust diagnosis of analog circuits, including effects due to tolerances and nonlinearities. The concepts are extended to include an approach to built-in test of analog or mixed signal ASICs.

AB - Experimental results using neural networks to provide go/no-go testing and fault diagnosis of analog circuits are presented. The primary focus is on reducing test time and providing a simple mechanism for automatic test pattern generation. Networks of reasonable dimension are shown to be capable of robust diagnosis of analog circuits, including effects due to tolerances and nonlinearities. The concepts are extended to include an approach to built-in test of analog or mixed signal ASICs.

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U2 - 10.1109/ASIC.1992.270220

DO - 10.1109/ASIC.1992.270220

M3 - Conference contribution

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T3 - Proceedings of International Conference on ASIC

SP - 355

EP - 358

BT - Proceedings - 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992

PB - IEEE Computer Society

T2 - 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992

Y2 - 21 September 1992 through 25 September 1992

ER -

Fault diagnosis of analog circuits using artificial neural networks as signature analyzers

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