TY - GEN
T1 - Examining the impact of aggregated design impulses on process architecture in distributed design
AU - Ghosh, Sourobh
AU - Devendorf, Erich
AU - Lewis, Kemper
PY - 2013
Y1 - 2013
N2 - During the design of complex systems, a design process may be subjected to stochastic inputs, interruptions, and changes. These design impulses can have a significant impact on the transient response and converged equilibrium for the design system. We distinguish this research by focusing on the interactions between local and architectural impulses in the form of designer mistakes and dissolution, division, and combination impulses, respectively. We find that local impulses tend to slow convergence but systems subjected to dissolution/division impulses still favor parallel arrangements. The strategy to mitigate combination impulses is unaffected by the presence of local impulses.
AB - During the design of complex systems, a design process may be subjected to stochastic inputs, interruptions, and changes. These design impulses can have a significant impact on the transient response and converged equilibrium for the design system. We distinguish this research by focusing on the interactions between local and architectural impulses in the form of designer mistakes and dissolution, division, and combination impulses, respectively. We find that local impulses tend to slow convergence but systems subjected to dissolution/division impulses still favor parallel arrangements. The strategy to mitigate combination impulses is unaffected by the presence of local impulses.
UR - https://www.scopus.com/pages/publications/84896958700
U2 - 10.1115/DETC2013-13315
DO - 10.1115/DETC2013-13315
M3 - Conference contribution
AN - SCOPUS:84896958700
SN - 9780791855898
T3 - Proceedings of the ASME Design Engineering Technical Conference
BT - 39th Design Automation Conference
PB - American Society of Mechanical Engineers
T2 - ASME 2013 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference, IDETC/CIE 2013
Y2 - 4 August 2013 through 7 August 2013
ER -