Abstract
Here, several classes of magneto-electric devices, and their possible implementations as complementary metal-oxide-semiconductor (CMOS) replacements, are discussed. We consider how these devices can provide considerable improvements in functionality over CMOS when employed in novel circuit architectures. In the context of the magneto-electric device technologies discussed here, we detail the expansion of benchmarking into some of the newer beyond-CMOS technologies. This has required circuit level simulations, using Cadence Spectre or Spice, and Verilog-A based models of the magneto-electric magnetic tunnel junction devices have been used for circuit validation. This has been done as part of a global effort to develop comparative benchmarking standards across logic families, even as new benchmarking methodologies are being developed, while maintaining the familiar CMOS benchmarks.
| Original language | English |
|---|---|
| Article number | 073001 |
| Journal | Semiconductor Science and Technology |
| Volume | 35 |
| Issue number | 7 |
| DOIs | |
| State | Published - Jul 2020 |
Keywords
- Beyond-complementary metal-oxide-semiconductor
- complementary metal-oxide-semiconductor
- full-adder
- logic
- magneto-electric feld effect transistor
- magneto-electric magnetic tunnel junction
- spintronics
- Verilog-A
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