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Dynamic techniques for yield enhancement of field programmable logic arrays

  • SUNY Buffalo

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

Two techniques are presented to increase the effective yield of field programmable logic arrays (FPLAs). In the first technique, a reconfiguration scheme is proposed to dynamically alter the product-term allocation of the mask PLA onto the product lines of the raw FPLA once a type-two fault is diagnosed. This technique does not require any extra product lines to obtain a usable destination FPLA. The second technique utilizes the often unused product lines within the FPLA. It is shown that once an error is detected during the programming procedure, a product line can always be desensitized from the rest of the FPLA. The intended product term is then simply reprogrammed onto one of the extra product lines.

Original languageEnglish
Title of host publicationDigest of Papers - International Test Conference
PublisherPubl by IEEE
Pages485-491
Number of pages7
ISBN (Print)0818608706
StatePublished - 1988

Publication series

NameDigest of Papers - International Test Conference
ISSN (Print)0743-1686

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