@inproceedings{f481f6aa70e74fd0ad6fe8254b721461,
title = "BIST-PLA: A BUILT-IN SELF-TEST DESIGN OF LARGE PROGRAMMABLE LOGIC ARRAYS.",
abstract = "A novel method for designing a built-in self-test (BIST) programmable logic array (PLA) is presented. In the proposed design, the test pattern generator and the response evaluator circuits are very simple. The design requires a rearrangement of the AND (OR) planes on the basis of number of crosspoints in the product (output) lines in the PLA. A program has been developed to generate a BIST-PLA from a given set of specifications of the PLA. The program was developed in the Unix environment, and was used to carry out the study on 22 large PLAs.",
author = "Liu, \{Chun Yeh\} and Saluja, \{Kewal K.\} and Upadhyaya, \{J. S.\}",
year = "1987",
doi = "10.1145/37888.37946",
language = "English",
isbn = "0818607815",
series = "Proceedings - Design Automation Conference",
publisher = "IEEE",
pages = "385--391",
booktitle = "Proceedings - Design Automation Conference",
}