TY - GEN
T1 - BenchLink
T2 - 2026 IEEE Conference on Computer Communications, INFOCOM 2026
AU - Nivas, Sidharth Santhi
AU - Vasanth Kumar, Prem Sagar Pattanshetty
AU - Zhang, Zhaoxi
AU - Zhao, Chenzhi
AU - McManus, Maxwell
AU - Mastronarde, Nicholas
AU - Bentley, Elizabeth Serena
AU - Sklivanitis, George
AU - Pados, Dimitris A.
AU - Guan, Zhangyu
N1 - Publisher Copyright:
© 2026 IEEE.
PY - 2026
Y1 - 2026
N2 - Accurate timing and synchronization, typically enabled by GPS, are essential for modern wireless communication systems. However, many emerging applications must operate in GPS-denied environments where signals are unreliable or disrupted, resulting in oscillator drift and carrier frequency impairments. To address these challenges, we present BenchLink, a System-on-Chip (SoC)-based benchmark for resilient communication links that functions without GPS and supports adaptive pilot density and modulation. Unlike traditional General Purpose Processor (GPP)-based software-defined radios (e.g. USRPs), the SoC-based design allows for more precise latency control. We implement and evaluate BenchLink on Zynq UltraScale+ MPSoCs, and demonstrate its effectiveness in both ground and aerial environments. A comprehensive dataset has also been collected under various conditions. We have made both the SoC-based link design and dataset available to the wireless community. BenchLink is expected to facilitate future research on data-driven link adaptation, resilient synchronization in GPS-denied scenarios, and emerging applications that require precise latency control, such as integrated radar sensing and communication.
AB - Accurate timing and synchronization, typically enabled by GPS, are essential for modern wireless communication systems. However, many emerging applications must operate in GPS-denied environments where signals are unreliable or disrupted, resulting in oscillator drift and carrier frequency impairments. To address these challenges, we present BenchLink, a System-on-Chip (SoC)-based benchmark for resilient communication links that functions without GPS and supports adaptive pilot density and modulation. Unlike traditional General Purpose Processor (GPP)-based software-defined radios (e.g. USRPs), the SoC-based design allows for more precise latency control. We implement and evaluate BenchLink on Zynq UltraScale+ MPSoCs, and demonstrate its effectiveness in both ground and aerial environments. A comprehensive dataset has also been collected under various conditions. We have made both the SoC-based link design and dataset available to the wireless community. BenchLink is expected to facilitate future research on data-driven link adaptation, resilient synchronization in GPS-denied scenarios, and emerging applications that require precise latency control, such as integrated radar sensing and communication.
KW - Field-Programmable Gate Array (FPGA)
KW - GPS-Denied Communication
KW - Software-Defined Radio (SDR)
KW - System-on-Chip (SoC)
UR - https://www.scopus.com/pages/publications/105044500303
U2 - 10.1109/INFOCOM59046.2026.11571474
DO - 10.1109/INFOCOM59046.2026.11571474
M3 - Conference contribution
AN - SCOPUS:105044500303
T3 - Proceedings - IEEE INFOCOM
BT - INFOCOM 2026 - IEEE Conference on Computer Communications
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 18 May 2026 through 21 May 2026
ER -