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An investigation of the impact of network parameters on performance of Network-on-Chips

  • SUNY Buffalo

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

Communication-centric designs such as Network-on-Chip (NoC) have been shown to have significant potential in overcoming the problems of increased wire delay and delay variations in deep submicron global interconnects. To further enhance performance, the design parameters of the NoC should be chosen based on the application. In this paper, we identify these parameters and investigate their impact on the NoC system performance. For this purpose, we classified NoC applications into three broad categories, based on the traffic pattern in the network, and simulations were performed with different combinations of the network parameters for each application. We present detailed analysis of this comparative study, which could help system designers in making appropriate choices for the different network parameters in designing an NoC for a particular application.

Original languageEnglish
Title of host publication2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005
Pages1617-1620
Number of pages4
DOIs
StatePublished - 2005
Event2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005 - Cincinnati, OH, United States
Duration: Aug 7 2005Aug 10 2005

Publication series

NameMidwest Symposium on Circuits and Systems
Volume2005
ISSN (Print)1548-3746

Conference

Conference2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005
Country/TerritoryUnited States
CityCincinnati, OH
Period08/7/0508/10/05

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