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An energy efficient in-memory computing machine learning classifier scheme

  • SUNY Buffalo

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

Large-scale machine learning (ML) algorithms require extensive memory interactions. Managing or preventing data movement can significantly increase the speed and efficiency of many ML tasks. Towards this end, we devise an energy efficient in-memory computing kernel for a ML linear classifier and a prototype is designed. Compared with another in-memory computing kernel for ML applications [1], we achieve a power savings of over 6.4 times than a conventional discrete system while improving reliability by 54.67%. We employ a split-data-aware technique to manage process, voltage and temperature variations. We utilize a trimodal architecture with hierarchical tree structure to further decrease power consumption. Our scheme provides a fast, energy efficient, and competitively accurate binary classification kernel.

Original languageEnglish
Title of host publicationProceedings - 32nd International Conference on VLSI Design, VLSID 2019 - Held concurrently with 18th International Conference on Embedded Systems, ES 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages157-162
Number of pages6
ISBN (Electronic)9781728104096
DOIs
StatePublished - May 9 2019
Event32nd International Conference on VLSI Design, VLSID 2019 - New Delhi, India
Duration: Jan 5 2019Jan 9 2019

Publication series

NameProceedings - 32nd International Conference on VLSI Design, VLSID 2019 - Held concurrently with 18th International Conference on Embedded Systems, ES 2019

Conference

Conference32nd International Conference on VLSI Design, VLSID 2019
Country/TerritoryIndia
CityNew Delhi
Period01/5/1901/9/19

Keywords

  • Classifier
  • Hybrid
  • In-memory computing
  • Low power
  • Machine Learning
  • Trimodal

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