An analysis of cube-connected cycles and circular shuffle networks for parallel computation

This paper is concerned with demonstrating isomorphism between two classes of computer architectures that support parallel computation, viz., the cube-connected cycles (CCC) network and the homogeneous circular shuffle network (HCSN). This is done by developing a suitable and common notation for addressing processing elements and specifying interconnections in the two networks. The implications of such an equivalence are discussed. Properties and algorithms concerning HCSN networks, with respect to routing and fault tolerance, thereby, immediately become applicable to CCC networks. As for HCSN networks, their VLSI layout is now apparent. The networks are shown to be totally symmetric with respect to each processor, and in some cases may be recursively defined in terms of modules. Further, any algorithm that runs on an HCSN network also runs on a CCC network without any modification. It is also shown that a large class of algorithms that run on a CCC network can be implemented, with slight modification, on an HCSN network. In particular, an implementation of the DESCENT algorithm on an HCSN network is proposed.