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An analysis of a reconfigurable binary tree architecture based on multiple-level redundancy

  • SUNY Buffalo

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

The analysis of a multiple-level redundant tree (MLRT) structure is presented for the design of a reconfigurable tree architecture. The MLRT scheme tolerates the catastrophic failure of several locally redundant modules in the corresponding locally redundant modular tree (LRMT) structure. This analysis and experimental study establishes the advantages of the MLRT structure over the LRMT structure. The switch failures are taken into account for an accurate analysis of the reliability. A new measure, called the marginal-switch-to-processing-element-area ratio (MSR), is introduced to characterize the effect of switch complexity on the reliability of the redundant system. It can be used as an evaluation criterion in the design of practical fault-tolerant multiprocessor architectures. A technique for obtaining the best spare distribution in the MLRT structure is presented.

Original languageEnglish
Title of host publicationDigest of Papers - FTCS (Fault-Tolerant Computing Symposium)
PublisherPubl by IEEE
Pages192-199
Number of pages8
ISBN (Print)081862051X
StatePublished - 1990
Event20th International Symposium on Fault-Tolerant Computing - FTCS 20 - Chapel Hill, NC, USA
Duration: Jun 26 1990Jun 28 1990

Publication series

NameDigest of Papers - FTCS (Fault-Tolerant Computing Symposium)
ISSN (Print)0731-3071

Conference

Conference20th International Symposium on Fault-Tolerant Computing - FTCS 20
CityChapel Hill, NC, USA
Period06/26/9006/28/90

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