A series DC arc fault detection method and hardware implementation

DC arc fault detection is important to provide circuit protection and improve system reliability in applications with high voltage dc bus. In this paper, current change in time domain and normalized RMS value from wavelet decomposition are selected as arc signatures representing the randomness and chaotic nature of arcing. A detection algorithm is then proposed utilizing these two arc signatures to differentiate between arc fault and normal condition. Lastly the detection algorithm is realized on a digital signal processing board and is tested to verify its effectiveness. Experiment results show that the proposed detection algorithm can detect arc fault in a timely manner and is free of nuisance trip from normal circuit operations such as load change condition.