A 45-75MHz 197-452μW oscillator with 164.6dB FoM and 2.3psrms period jitter in 65nm CMOS

Junheng Zhu; Makrand Mahalley; Guanghua Shu; Woo Seok Choi; Romesh Kumar Nandwana; Ahmed Elkholy; Bibhudatta Sahoo; Pavan Kumar Hanumolu

doi:10.1109/CICC.2017.7993679

A 45-75MHz 197-452μW oscillator with 164.6dB FoM and 2.3ps_rms period jitter in 65nm CMOS

Junheng Zhu
, Makrand Mahalley
, Guanghua Shu
, Woo Seok Choi
, Romesh Kumar Nandwana
, Ahmed Elkholy
, Bibhudatta Sahoo
, Pavan Kumar Hanumolu

Department of Electrical Engineering

University of Illinois at Urbana-Champaign
Analog Devices, Inc.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

This paper presents a novel oscillator architecture that uses a low frequency temperature stable clock generated by a low power RC relaxation oscillator to improve the temperature stability of a low noise ring oscillator. Fabricated in 65nm CMOS process, the prototype oscillator consumes 197 to 452μW across an output frequency range of 45-to-75MHz. At 70MHz, the measured period jitter is 2.3ps_rms with phase noise of -104dBc/Hz at 100kHz offset, which translates to an FoM of 164.6dB.

Original language	English
Title of host publication	38th Annual Custom Integrated Circuits Conference
Subtitle of host publication	A Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781509051915
DOIs	https://doi.org/10.1109/CICC.2017.7993679
State	Published - Jul 26 2017
Event	38th Annual Custom Integrated Circuits Conference, CICC 2017 - Austin, United States Duration: Apr 30 2017 → May 3 2017

Publication series

Name	Proceedings of the Custom Integrated Circuits Conference
Volume	2017-April
ISSN (Print)	0886-5930

Conference

Conference	38th Annual Custom Integrated Circuits Conference, CICC 2017
Country/Territory	United States
City	Austin
Period	04/30/17 → 05/3/17

Keywords

period jitter
phase noise
relaxation oscillator
ring oscillator

Access to Document

10.1109/CICC.2017.7993679

Cite this

Zhu, J., Mahalley, M., Shu, G., Choi, W. S., Nandwana, R. K., Elkholy, A., Sahoo, B., & Hanumolu, P. K. (2017). A 45-75MHz 197-452μW oscillator with 164.6dB FoM and 2.3ps_rms period jitter in 65nm CMOS. In 38th Annual Custom Integrated Circuits Conference: A Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017 Article 7993679 (Proceedings of the Custom Integrated Circuits Conference; Vol. 2017-April). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CICC.2017.7993679

Zhu, Junheng ; Mahalley, Makrand ; Shu, Guanghua et al. / A 45-75MHz 197-452μW oscillator with 164.6dB FoM and 2.3ps_rms period jitter in 65nm CMOS. 38th Annual Custom Integrated Circuits Conference: A Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017. Institute of Electrical and Electronics Engineers Inc., 2017. (Proceedings of the Custom Integrated Circuits Conference).

@inproceedings{46f977dbdbd44b9e825657feed767620,

title = "A 45-75MHz 197-452μW oscillator with 164.6dB FoM and 2.3psrms period jitter in 65nm CMOS",

abstract = "This paper presents a novel oscillator architecture that uses a low frequency temperature stable clock generated by a low power RC relaxation oscillator to improve the temperature stability of a low noise ring oscillator. Fabricated in 65nm CMOS process, the prototype oscillator consumes 197 to 452μW across an output frequency range of 45-to-75MHz. At 70MHz, the measured period jitter is 2.3psrms with phase noise of -104dBc/Hz at 100kHz offset, which translates to an FoM of 164.6dB.",

keywords = "period jitter, phase noise, relaxation oscillator, ring oscillator",

author = "Junheng Zhu and Makrand Mahalley and Guanghua Shu and Choi, \{Woo Seok\} and Nandwana, \{Romesh Kumar\} and Ahmed Elkholy and Bibhudatta Sahoo and Hanumolu, \{Pavan Kumar\}",

note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 38th Annual Custom Integrated Circuits Conference, CICC 2017 ; Conference date: 30-04-2017 Through 03-05-2017",

year = "2017",

month = jul,

day = "26",

doi = "10.1109/CICC.2017.7993679",

language = "English",

series = "Proceedings of the Custom Integrated Circuits Conference",

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Zhu, J, Mahalley, M, Shu, G, Choi, WS, Nandwana, RK, Elkholy, A, Sahoo, B & Hanumolu, PK 2017, A 45-75MHz 197-452μW oscillator with 164.6dB FoM and 2.3ps_rms period jitter in 65nm CMOS. in 38th Annual Custom Integrated Circuits Conference: A Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017., 7993679, Proceedings of the Custom Integrated Circuits Conference, vol. 2017-April, Institute of Electrical and Electronics Engineers Inc., 38th Annual Custom Integrated Circuits Conference, CICC 2017, Austin, United States, 04/30/17. https://doi.org/10.1109/CICC.2017.7993679

A 45-75MHz 197-452μW oscillator with 164.6dB FoM and 2.3ps_rms period jitter in 65nm CMOS. / Zhu, Junheng; Mahalley, Makrand; Shu, Guanghua et al.
38th Annual Custom Integrated Circuits Conference: A Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017. Institute of Electrical and Electronics Engineers Inc., 2017. 7993679 (Proceedings of the Custom Integrated Circuits Conference; Vol. 2017-April).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Mahalley, Makrand

AU - Shu, Guanghua

AU - Choi, Woo Seok

AU - Nandwana, Romesh Kumar

AU - Elkholy, Ahmed

AU - Sahoo, Bibhudatta

AU - Hanumolu, Pavan Kumar

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N2 - This paper presents a novel oscillator architecture that uses a low frequency temperature stable clock generated by a low power RC relaxation oscillator to improve the temperature stability of a low noise ring oscillator. Fabricated in 65nm CMOS process, the prototype oscillator consumes 197 to 452μW across an output frequency range of 45-to-75MHz. At 70MHz, the measured period jitter is 2.3psrms with phase noise of -104dBc/Hz at 100kHz offset, which translates to an FoM of 164.6dB.

AB - This paper presents a novel oscillator architecture that uses a low frequency temperature stable clock generated by a low power RC relaxation oscillator to improve the temperature stability of a low noise ring oscillator. Fabricated in 65nm CMOS process, the prototype oscillator consumes 197 to 452μW across an output frequency range of 45-to-75MHz. At 70MHz, the measured period jitter is 2.3psrms with phase noise of -104dBc/Hz at 100kHz offset, which translates to an FoM of 164.6dB.

KW - period jitter

KW - phase noise

KW - relaxation oscillator

KW - ring oscillator

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Zhu J, Mahalley M, Shu G, Choi WS, Nandwana RK, Elkholy A et al. A 45-75MHz 197-452μW oscillator with 164.6dB FoM and 2.3ps_rms period jitter in 65nm CMOS. In 38th Annual Custom Integrated Circuits Conference: A Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017. Institute of Electrical and Electronics Engineers Inc. 2017. 7993679. (Proceedings of the Custom Integrated Circuits Conference). doi: 10.1109/CICC.2017.7993679